Field of the Disclosure
The present disclosure generally relates to processors, and more particularly, to suppression of dependent instructions.
Description of the Related Art
Processors typically enhance processing efficiency by employing out-of-order execution, whereby instructions are executed in an order different from the program order of the instructions. In replay processors, in addition to out-of-order execution, instructions may be executed speculatively based on an assumption that the memory subsystem will provide requested data prior to the execution of the instruction. For example, a speculative load may be executed based on the assumption that a previous store will have been completed so that the data for the load is available. A scheduler in the processor schedules and tracks speculatively executed instructions. Data from the speculative load may be used by other instructions to perform other operations. These other instructions are referred to as dependent instructions. A dependent or child instruction is an instruction having one or more operands that depend on the execution of other instructions. Multiple levels of dependency may be present in that a particular parent instruction may have a dependent child instruction, and the child instruction may have its own dependent instruction(s). In a single cycle scheduler, when an instruction is picked, it immediately awakes its dependents, who do the same in turn. If this chain goes uninterrupted, the chain of dependent instructions of a load may be described as a “wave front.” It is difficult to interrupt this wave front if it is discovered that the ancestor load instruction had invalid status due to the timing critical awake-pick path in a such a scheduler.
A speculatively executed load instruction may generate invalid results due to a load failure, because the memory subsystem is not ready to provide the data for the load. In response to identifying the invalid status of a speculatively executed instruction, the scheduler may replay or reissue the instruction with the invalid status and any of its dependents that had also been speculatively executed(s) in the wave front so that they can be executed with the correct operands. Because the scheduler speculatively issues instructions that span multiple levels of dependency, the number of instructions subject to replay may be significant. Replaying mis-speculated instructions causes a decrease in efficiency of the processor and an increase in power consumption.
The use of the same reference symbols in different drawings indicates similar or identical items.